J-LINK REDUCES JTAG DEBUG PINCOUNT FROM 5 to 1! Pittsford, New York—Traditional JTAG boundary-scan testing normally takes up 5 valuable pins on an i.c., requires 5 resistors, and increases chip power.

风河系统公司（Wind River）宣布推出Wind River Workbench On-Chip Debugging 3.1.1，将这套综合性开发工具的支持平台拓展到Freescale、Intel和RMI处理器。 风河系统公司（Wind River）宣布推出Wind River Workbench On-Chip Debugging ...

Recently I started to evaluate a development kit that cost about $US 180. Taking the kit beyond a basic demonstration, though, required using a “JTAG” programming ...

usbDemon Fully Compatible with Industry-Leading Software Debuggers and Microprocessor Architectures SAN FRANCISCO, CA-March 29, 2004 - Macraigor Systems, an on-chip debug (OCD) industry leader, today ...

The Joint Test Action Group (JTAG) was formed in mid 1980s to develop a method of verifying designs and testing printed circuit boards after manufacture. Prior to the development of JTAG, testing and ...

Adafruit has announced the arrival of a new piece of kit to their online store in the form of the IBDAP – CMSIS-DAP JTAG/SWD Debug Adapter Kit, which is now available to purchase priced at $19.95. The ...

JTAG debuggers tend to be large, fast, and expensive, or cheap and slow. The new crop of USB-based JTAG debuggers is cutting the cost while keeping the performance high. I recently had a chance to ...

Intel responded to a claim about hackers gaining hardware-level access to PCs sporting its sixth- and seventh-generation processors. The claim was made during a presentation at the 33rd annual Chaos ...

Cambridge, UK A UK company has developed a JTAG debug scheme that reduces the number of device pins required for debug from five to one. Debug Innovations' J-LINK system was architected and designed ...

Anyone who enjoys building electronic projects may find the new IDAP-Link debug JTag Probe created by I-SYST worth more investigation, as well as helpful building electronic projects. The small ...